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Dialog Improves System Performance
Non-volatile memory (NVM) is a key component at the heart of every system design. It holds critical data, controls how the system boots, and affects overall performance. Choosing the right NVM is key. We’re here to help. Our wide range of NVM products offer an array of features designed to help tune and optimize your system.
Octal xSPI Memory
Hi-Performace
xSPI (8x SPI)
High bandwidth
Low power
eXecute-in-Place (XiP)
Read-While-Write
Security
Dual / Quad SPI Memory
Universal
SPI, Dual, Quad
1.8V, 3.0V. Wide VCC
Ultra-low Energy, Low Power
7nA sleep
Battery monitor
Security
DataFlash SPI Memory
Fast Flexible Robust
Concurrent programming
Easy to use
Power fail protection
Data integrity
Low power modes
Security
Wafer KGD
Known Good Die program
Up to 125°C operating temperature
All voltage levels
- 1.8V
- 3.0V
- Wide Voltage 1.65V to 3.6V
Verified Memory for ST Microelectronics
Dialog SPI Flash solutions verified on over 30 STM32 MCUs
CBRAM Technology
CBRAM is a resistive RAM technology that provides power, speed, and cost benefits over other non-volatile memory technologies. It is well suited for battery powered devices, edge computing, and AI applications.
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8 months ago
AT45DB041E FLASH_ERASE_WRITE_PAGE
Posted bychristian.oppliger10 points 1 replyHi all
We use the AT45DB041E flash. In the datasheet is written that the endurance is 100'000 programm/erase cycles per page minimum.
In case that i erase the page with cmd nr 81h and programm page with cmd nr 02h there are only 50'000 cycles right?
in case of using the cmd erase and programm (82h) there will be 100 cylces?
is that correctly?
Thank you
8 months ago
Hi Christian,
We count a Program and Erase as one cycle so you could program and erase a page of memory 100K times (we have seen customers cycle these parts up to 2M times before giving up testing without failures but we can not guarantee this performance). We would STRONGLY recommend that you keep static data and high endurance data in separate 64k Blocks to ensure that the writes to the high endurance area does not 'disturb' the static data. If this can not be easily managed, then we recommend rewriting the static data every ~50k cycles of the high endurance data and we include a READ-MODIFY-WRITE command to help with this.
As you increase the number of cycles a specific part of memory has undergone you will see program and erase times creep out towards the maxima in the datasheets.
Note that we have the EPE bit in the status register that helps manage Run until First Failure systems where you cycle the part until an operation fails. This bit will indicate whether a program or erase cycle completes successfully. So the program or erase cycle becomes - start program cycle - test Status Reg bit 7 (Ready/Busy bit) - when READY test EPE bit...