* SLG59M1440V集成电源开关SPICE模型* SILEGO科技************************************************* *软件许可协议* * * *的软件提供此通过Silego Technology Incorporated（以下* *“公司”）的目的是提供给您，本公司的客户，使用*负全部并雷电竞下载app专门对Silego产品。雷电竞官网登录* * * *该软件是由本公司和/或其供应商所有，受保护* *根据适用的版雷电竞下载app权法。公司保留所有权利。在*违反前述约束的使用可能使用户刑事*制裁适用法律，以及民事责任的*违背此许可的条款和条件。* * * * *本软件提供了一种在 'AS IS' 条件。任何形式的保证，无论是*明示，暗示或法定的，包括但不限于，暗示*适销性和针对特定用途的担保不适用于* *本软件。本公司不雷电竞下载app得在任何情况下，都不对*特殊，偶然或必然的损害，以任何理由。* **************************** *建议：使用了LTSpice（其它模拟器可能需要翻译）* *版本：001 *日期: 13-May-2016 * * Revision History: * 001: 13-May-2016, Created * * * Attributes Modeled: * ON pin Hysteresis and Delay, Slew Rate, RDSon, Power Supply Current * * PIN descriptions: * ON1 Turns on MOSFET. Configurable slew rate control depending on input current. * D Drain Terminal of MOSFET * S Source Terminal of MOSFET * GND Ground * .SUBCKT SLG59M1440V ON1 D S GND G1 0 N011 VE5 0 TABLE (2.4975,0) (2.49751, 3u) (2.51, 3u) (3.29,4.25u)(3.3,4.25u)(4,2.4u) (4.5,1.65u)(4.99,6.8u)(5,7u) (5.49,6.8u) (5.501,6.8u)(6,0) C2 CAP 0 4n S1 D VR Vsen 0 SWen R5 VR 0 230k E4 P011 0 D 0 1 E11 E11 0 CAP N003 TABLE(-10m,-10)(0,0)(4.2m,4.2) R2 N003 N001 40K RDIS CAP P001 150 V2 S N002 0 V3 N003 N004 0 E2 ONinv 0 ON1 0 TABLE (0.299,5) (0.3,0) E3 N006 0 VALUE{V(E11)+V(D)} V5 N008 0 0 E5 VE5 0 Value {delay(V(VR),2.4ms)} R1 N006 N007 1k D2 ON1 P002 D R6 Vsen 0 10 V P002 Vsen 0.46 C3 N003 0 10p S5 N009 0 ONinv 0 SW5 R4 S N009 150 XU1 P011 N006 N003 N004 NMOS_slg W=6.48u, L = 0.18u XU2 P011 N007 S N002 NMOS_slg W = 13.5m, L = 0.18u XU3 P001 ONinv 0 N008 NMOS_slg W = 82.08m, L = 0.18u G2 0 N012 N013 0 TABLE(0,0)(500.185E-6,0.00285m)(1.0014836m,0.0053m)(1.5003m,0.007m)(2.00107m,0.009m)(2.50858m,0.012m) E1 N013 0 Value {delay(V(Vsen),2.4ms)} F1 CAP 0 POLY(2) Vtest1 Vtest2 0 0 0 0 -1.66E5 Vtest2 CAP N012 0 Vtest1 N010 N011 0 R7 N010 0 1k V1 N001 0 5.8m * models .model SWen SW(Ron=5 Roff=5.7Meg Vt=50u Vh=0) .model SW5 SW(Ron=1 Roff=1Meg Vt= 0.5 Vh=0.2) .model D D *Silego NMOS .subckt NMOS_slg 1 2 3 4 * D G S B M1 1 2 3 4 NMOS_slg L={L} W={W} AS={2u*W} PS={2*(2u+W)} AD={2u*W} PD={2*(2u+W)} .MODEL NMOS_slg NMOS (LEVEL = 8 +VERSION = 3.1 TNOM = 27 TOX = 4.1E-9 +XJ = 1E-7 NCH = 2.3549E17 VTH0 = 0.354505 +K1 = 0.5733393 K2 = 3.177172E-3 K3 = 27.3563303 +K3B = -10 W0 = 2.341477E-5 NLX = 1.906617E-7 +DVT0W = 0 DVT1W = 0 DVT2W = 0 +DVT0 = 1.6751718 DVT1 = 0.4282625 DVT2 = 0.036004 +U0 = 327.3736992 UA = -4.52726E-11 UB = 4.46532E-19 +UC = -4.74051E-11 VSAT = 8.785346E4 A0 = 1.6897405 +AGS = 0.2908676 B0 = -8.224961E-9 B1 = -1E-7 +KETA = 0.021238 A1 = 8.00349E-4 A2 = 1 +RDSW = 105 PRWG = 0.5 PRWB = -0.2 +WR = 1 WINT = 0 LINT = 1.351737E-8 *+XL = -2E-8 XW = -1E-8 + DWG = 1.610448E-9 +DWB = -5.108595E-9 VOFF = -0.0652968 NFACTOR = 2.4901845 +CIT = 0 CDSC = 2.4E-4 CDSCD = 0 +CDSCB = 0 ETA0 = 0.0231564 ETAB = -0.058499 +DSUB = 0.9467118 PCLM = 0.8512348 PDIBLC1 = 0.0929526 +PDIBLC2 = 0.01 PDIBLCB = -0.1 DROUT = 0.5224026 +PSCBE1 = 7.979323E10 PSCBE2 = 1.522921E-9 PVAG = 0.01 +DELTA = 0.01 RSH = 6.8 MOBMOD = 1 +PRT = 0 UTE = -1.5 KT1 = -0.11 +KT1L = 0 KT2 = 0.022 UA1 = 4.31E-9 +UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4 +WL = 0 WLN = 1 WW = 0 +WWN = 1 WWL = 0 LL = 0 +LLN = 1 LW = 0 LWN = 1 +LWL = 0 CAPMOD = 2 XPART = 0.5 +CGDO = 7.7E-10 CGSO = 7.7E-10 CGBO = 1E-12 +CJ = 1.010083E-3 PB = 0.7344298 MJ = 0.3565066 +CJSW = 2.441707E-10 PBSW = 0.8005503 MJSW = 0.1327842 +CJSWG = 3.3E-10 PBSWG = 0.8005503 MJSWG = 0.1327842 +CF = 0 PVTH0 = 1.307195E-3 PRDSW = -5 +PK2 = -1.022757E-3 WKETA = -4.466285E-4 LKETA = -9.715157E-3 +PU0 = 12.2704847 PUA = 4.421816E-11 PUB = 0 +PVSAT = 1.707461E3 PETA0 = 1E-4 PKETA = 2.348777E-3 ) * .ENDS .ENDS SLG59M1440V